Resistive Logic Level Shifter Calculator, 5 V to 3.3 V

Resistive Level Shifting Between Logic Families

"5 V to 3.3 V with two resistors" is one of the most repeated pieces of advice in electronics, and it is right about half the time. The arithmetic is a voltage divider; what makes it a level shifter is a set of conditions the divider has to satisfy, and three of the four are routinely skipped.

The divider sets the ratio

R1 goes from the driving output to the node, R2 from the node to ground, and the input being driven sits on the node. Since a CMOS input draws essentially no current, the node is just a divider output:

Using the guaranteed figure is the first thing people get wrong. A 5 V CMOS output sits within millivolts of 5 V in practice, but the datasheet only promises 4.4 V under load — and a design that works because the typical case is better than the promise is a design that fails on some future batch.

Three DC conditions

All three must hold, and each fails in a different way:

• The shifted high must be at or above the destination’s VIH, or a logic one is not reliably read as one. Symptom: works at room temperature, fails when warm.
• The shifted low must be at or below its VIL. Almost always satisfied, since dividing a low output makes it lower — but check it if the driving part has a poor VOL.
• The shifted high must not exceed the destination’s supply. Beyond that its input protection diodes conduct into the rail, which injects current into the destination and can hold up its supply when it is meant to be off.

Why 2:1 is the wrong answer for 5 V to 3.3 V

Two equal resistors is the obvious choice and it is marginal. 4.4 V halved is 2.2 V. True 3.3 V CMOS uses a VIH of 0.7 × Vcc, which is 2.31 V — so the popular answer is 110 mV BELOW the threshold and fails on the guaranteed numbers, even though it works on the bench where the output really is near 5 V.

It is also why the same divider does work into 3.3 V LVTTL, which kept the old TTL threshold of 2.0 V. The two are both "3.3 V logic" and they are not interchangeable here, which is why the tool above asks which one you have.

The better target is the middle of the usable window — between VIH and the destination supply — because every real tolerance eats into the margin from both sides. For 5 V CMOS into 3.3 V CMOS that means aiming at about 2.8 V, which a 1:2 divider (10 k over 20 k) delivers at 2.93 V.

The fourth condition: is it fast enough

This is the one that turns a working design into an intermittent one. The divider’s Thevenin resistance drives the destination’s input capacitance, and the two form a low-pass filter:

The numbers are sobering. 100 k over 100 k into 5 pF gives a 250 ns time constant and a limit around 640 kHz — fine for a 9600 baud UART, hopeless for a 10 MHz SPI clock. Push to 1 M and 1 M and the limit is 64 kHz. Nothing in the DC calculation gives any hint of this, which is exactly why the edges round off and a fast bus stops working while a slow one on the same board is fine.

Lowering the resistances fixes it and costs standing current: the divider draws VOH/(R1+R2) whenever the output is high. That trade — speed against current — is the whole design decision once the levels pass.

A divider only goes down

Two resistors cannot raise a voltage, so there is no resistive answer to 3.3 V driving 5 V logic. Sometimes none is needed: a 5 V part with TTL-threshold inputs (an HCT family device, or many microcontrollers) reads 2.4 V as a high and 3.3 V logic drives it directly. Where the destination genuinely needs 0.7 × 5 V, the answer is a MOSFET shifter, a translator IC, or an open-drain output with a pull-up to the higher rail.

Worked example

All three DC conditions pass with real margin, which the popular 10 k over 10 k version does not — that gives 2.2 V against a 2.31 V threshold. The number to think about here is the 4.8 MHz: fine for I²S, UART or a slow SPI, and not enough for a 10 MHz clock. Dropping to 1 k and 2 k moves the limit to 48 MHz and raises the standing current from 147 µA to 1.47 mA.

When a Resistive Divider Is the Wrong Tool

Four situations where no choice of resistors helps, and recognising them saves hours.

Bidirectional buses

A divider is directional: it works one way and loads the line the other. Anything where both ends drive — a bidirectional data line, a shared bus — needs a proper transceiver or a MOSFET shifter that works in both directions.

I²C

I²C lines are open-drain with a pull-up, so the high level is set by the pull-up rail rather than by any output. A divider on an I²C line fights the pull-up and ruins the low level. The correct answers are a single pull-up to the lower rail if both parts tolerate it, or a dedicated bidirectional level translator.

Fast signals

Anything above a few megahertz needs resistances low enough that the standing current becomes awkward. At that point a translator IC is both better and often cheaper than two precision resistors and a redesign.

Shifting upwards

Resistors cannot raise a voltage. Check first whether you need to: many 5 V parts have TTL-threshold inputs and accept 3.3 V directly, which makes the whole problem disappear.

The Alternatives, Ranked by Cost

• Nothing at all. If the destination is 5 V-tolerant, or has TTL thresholds, connect the two directly. Check the absolute maximum ratings and the VIH — this is free and it is the most commonly missed option.
• A single series resistor. Where the destination has clamp diodes to its own rail, a resistor of a few kilohms limits the current into them to a safe level. Widely used and slightly disreputable: it works, it relies on a protection structure for normal operation, and it can hold up the destination supply.
• The two-resistor divider on this page. Cheap, unidirectional, and limited by its RC.
• A single MOSFET plus two pull-ups — the standard bidirectional shifter, and what the small breakout boards contain. Works both ways, handles open-drain buses, costs three parts.
• A translator IC. Fast, clean, direction-controlled or auto-sensing, and the right answer for anything more than a couple of slow signals.

Reading VIH and VIL From a Datasheet

The four numbers that decide everything, and where the confusion lives.

CMOS thresholds scale with the supply

True CMOS inputs specify VIH as 0.7 × Vcc and VIL as 0.3 × Vcc, so they move with the rail: 2.31 V and 0.99 V at 3.3 V, 3.5 V and 1.5 V at 5 V. Wide thresholds like these give excellent noise immunity and make level shifting harder.

TTL thresholds are fixed

TTL and TTL-compatible inputs use 2.0 V and 0.8 V regardless of supply, which is a legacy of bipolar logic and is why they are so much easier to drive. HCT parts are CMOS with TTL thresholds, which exists precisely to solve this problem.

The trap: two different 3.3 V logics

LVTTL keeps 2.0 V and 0.8 V; 3.3 V CMOS uses 2.31 V and 0.99 V. Both are sold as "3.3 V logic". A divider that passes into one can fail into the other, and the part number is the only way to tell.

5 V-tolerant is not the same as 5 V logic

A 5 V-tolerant input can survive 5 V on its pin, which removes the need for a shifter in that direction. It says nothing about the output side — such a part still drives only to its own 3.3 V rail.

What This Calculator Assumes

• A CMOS destination whose input current is negligible. TTL inputs sink real current and a divider cannot hold the level against it — do not drive TTL through one.
• Guaranteed datasheet levels rather than typical ones. The margins reported are therefore worst-case, which is the point.
• The typical input capacitance for the family. Board trace capacitance adds to it, often doubling it, so treat the frequency limit as optimistic.
• A push-pull output. An open-drain output has no VOH of its own, so the divider analysis does not apply.
• One destination. Fanning out to several inputs multiplies the capacitance and divides the frequency limit accordingly.

Common mistakes

• Using the supply voltage instead of the guaranteed VOH. 5 V CMOS promises only 4.4 V, and the difference is exactly the margin a marginal divider does not have.
• Using 10 k over 10 k for 5 V to 3.3 V CMOS. It gives 2.2 V against a 2.31 V threshold — it fails on the datasheet numbers even though it usually works on the bench.
• Treating all 3.3 V logic as the same. LVTTL has a 2.0 V threshold and 3.3 V CMOS has 2.31 V, and a divider can pass into one and fail into the other.
• Ignoring the RC. A divider is a low-pass filter, and 100 k over 100 k into 5 pF stops working somewhere under a megahertz — invisible in any DC calculation.
• Putting a divider on an I²C line. The bus is open-drain and needs a pull-up; a divider fights it and ruins the low level.
• Trying to shift upwards with resistors. Check whether the 5 V part has TTL thresholds first — often no shifter is needed at all.

Frequently asked questions

Can I use two resistors to convert 5 V logic to 3.3 V?

Yes, for a unidirectional signal that is not too fast. Use a 1:2 divider — 10 kΩ over 20 kΩ gives 2.93 V from a guaranteed 4.4 V output, which clears the 2.31 V threshold of 3.3 V CMOS with real margin. A 1:1 divider gives 2.2 V and does not.

What resistor values should I use for a 5 V to 3.3 V level shifter?

10 kΩ and 20 kΩ is a good general answer: it draws about 150 µA and works to roughly 5 MHz. For faster signals scale both down — 1 kΩ and 2 kΩ reaches about 48 MHz at 1.5 mA. The ratio sets the level; the magnitude sets the speed and the current.

Why does my resistor level shifter not work at high speed?

Because the divider’s Thevenin resistance and the receiving input’s capacitance form a low-pass filter. With τ = (R1 ∥ R2) × Cin, the usable frequency is about 1/(2πτ) — 100 kΩ over 100 kΩ into 5 pF is only around 640 kHz.

Do I need a level shifter from 3.3 V to 5 V?

Often not. Many 5 V parts, including HCT-family logic and most microcontrollers, have TTL input thresholds of 2.0 V and read 3.3 V as a high directly. Check the VIH in the datasheet before adding anything — and note that resistors cannot shift upwards regardless.

Can I use a voltage divider on an I²C bus?

No. I²C is open-drain: the high level comes from a pull-up resistor, not from an output, so a divider fights the pull-up and spoils the low level. Use a single pull-up to the lower rail if both devices tolerate it, or a bidirectional translator.

What is the difference between VIH and VOH?

VOH is what an output guarantees to produce as a high; VIH is what an input requires to read one. A link works when the driver’s VOH, after any divider, is at or above the receiver’s VIH. The gap between them is the noise margin.

Is a single series resistor enough to protect a 3.3 V input from 5 V?

It usually works, by limiting current into the input’s clamp diodes, and it is widely done. It relies on a protection structure for normal operation, can inject current into the destination’s supply rail, and does not give a clean level — a divider or a proper translator is better practice.